nRF_API.h

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00001 /*This file has been prepared for Doxygen automatic documentation generation.*/
00015 
00016 /* Copyright (c) 2007, Atmel Corporation All rights reserved.
00017  *
00018  * Redistribution and use in source and binary forms, with or without
00019  * modification, are permitted provided that the following conditions are met:
00020  *
00021  * 1. Redistributions of source code must retain the above copyright notice,
00022  * this list of conditions and the following disclaimer.
00023  *
00024  * 2. Redistributions in binary form must reproduce the above copyright notice,
00025  * this list of conditions and the following disclaimer in the documentation
00026  * and/or other materials provided with the distribution.
00027  *
00028  * 3. The name of ATMEL may not be used to endorse or promote products derived
00029  * from this software without specific prior written permission.
00030  *
00031  * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
00032  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
00033  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
00034  * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
00035  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
00036  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00037  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
00038  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
00039  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
00040  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00041  */
00042 
00043 #include "config.h"
00044 
00045 
00046 // Low level pin definition check (hardware map)
00047 #ifndef  NRF_CS_PORT
00048 #error   NRF_CS_PORT should be defined somewhere (usually target_board_file.h)
00049 #endif
00050 
00051 #ifndef  NRF_CS_PIN
00052 #error   NRF_CS_PIN should be defined somewhere (usually target_board_file.h)
00053 #endif
00054 
00055 #ifndef  NRF_CE_PORT
00056 #error   NRF_CE_PORT should be defined somewhere (usually target_board_file.h)
00057 #endif
00058 
00059 #ifndef  NRF_CE_PIN
00060 #error   NRF_CE_PIN should be defined somewhere (usually target_board_file.h)
00061 #endif
00062 
00063 #ifndef  NRF_IRQ_PORT
00064 #error   NRF_IRQ_PORT should be defined somewhere (usually target_board_file.h)
00065 #endif
00066 
00067 #ifndef  NRF_IRQ_PIN
00068 #error   NRF_IRQ_PIN should be defined somewhere (usually target_board_file.h)
00069 #endif
00070 
00071 #ifndef  NRF_port_init
00072 #error   NRF_port_init() should be defined somewhere (usually target_board_file.h)
00073 #endif
00074 
00075 
00076 // Pin access
00077 #define   NRF_select()           (NRF_CS_PORT &= ~(1<<NRF_CS_PIN))
00078 #define   NRF_unselect()         (NRF_CS_PORT |= (1<<NRF_CS_PIN))
00079 #define   NRF_disable()          (NRF_CE_PORT &= ~(1<<NRF_CE_PIN))
00080 #define   NRF_enable()           (NRF_CE_PORT |= (1<<NRF_CE_PIN))
00081 
00082 
00083 // Define nRF24L01 interrupt flag's
00084 #define IDLE            0x00  // Idle, no interrupt pending
00085 #define MAX_RT          0x10  // Max #of TX retrans interrupt
00086 #define TX_DS           0x20  // TX data sent interrupt
00087 #define RX_DR           0x40  // RX data received
00088 
00089 #define SPI_CFG         0x40  // SPI Configuration register value
00090 #define SPI_CTR         0x01  // SPI Control register values
00091 #define SPI_CLK         0x00  // SYSCLK/2*(SPI_CLK+1) == > 12MHz / 2 = 6MHz
00092 #define SPI0E           0x02  // SPI Enable in XBR0 register
00093 
00094 
00095 // SPI(nRF24L01) commands
00096 #define READ_REG        0x00  // Define read command to register
00097 #define WRITE_REG       0x20  // Define write command to register
00098 #define RD_RX_PLOAD     0x61  // Define RX payload register address
00099 #define WR_TX_PLOAD     0xA0  // Define TX payload register address
00100 #define FLUSH_TX        0xE1  // Define flush TX register command
00101 #define FLUSH_RX        0xE2  // Define flush RX register command
00102 #define REUSE_TX_PL     0xE3  // Define reuse TX payload register command
00103 #define NOP             0xFF  // Define No Operation, might be used to read status register
00104 
00105 // SPI(nRF24L01) registers(addresses)
00106 #define CONFIG          0x00  // 'Config' register address
00107 #define EN_AA           0x01  // 'Enable Auto Acknowledgment' register address
00108 #define EN_RXADDR       0x02  // 'Enabled RX addresses' register address
00109 #define SETUP_AW        0x03  // 'Setup address width' register address
00110 #define SETUP_RETR      0x04  // 'Setup Auto. Retrans' register address
00111 #define RF_CH           0x05  // 'RF channel' register address
00112 #define RF_SETUP        0x06  // 'RF setup' register address
00113 #define STATUS          0x07  // 'Status' register address
00114 #define OBSERVE_TX      0x08  // 'Observe TX' register address
00115 #define CD              0x09  // 'Carrier Detect' register address
00116 #define RX_ADDR_P0      0x0A  // 'RX address pipe0' register address
00117 #define RX_ADDR_P1      0x0B  // 'RX address pipe1' register address
00118 #define RX_ADDR_P2      0x0C  // 'RX address pipe2' register address
00119 #define RX_ADDR_P3      0x0D  // 'RX address pipe3' register address
00120 #define RX_ADDR_P4      0x0E  // 'RX address pipe4' register address
00121 #define RX_ADDR_P5      0x0F  // 'RX address pipe5' register address
00122 #define TX_ADDR         0x10  // 'TX address' register address
00123 #define RX_PW_P0        0x11  // 'RX payload width, pipe0' register address
00124 #define RX_PW_P1        0x12  // 'RX payload width, pipe1' register address
00125 #define RX_PW_P2        0x13  // 'RX payload width, pipe2' register address
00126 #define RX_PW_P3        0x14  // 'RX payload width, pipe3' register address
00127 #define RX_PW_P4        0x15  // 'RX payload width, pipe4' register address
00128 #define RX_PW_P5        0x16  // 'RX payload width, pipe5' register address
00129 #define FIFO_STATUS     0x17  // 'FIFO Status Register' register address
00130 
00131 // Status bits definition
00132 #define NRF_RX_DR   6
00133 #define NRF_TX_DR   5
00134 #define NRF_MAX_RT  4
00135 
00136 
00137 
00138 // Public and usefull driver access
00139 
00140 #define NFR_read_reg(reg)        (NRF_Read(reg|READ_REG))
00141 #define NFR_write_reg(reg,val)   (NRF_RW_Reg(reg|WRITE_REG,val))
00142 
00143 #define NRF_init_tx()            (NRF_disable(),NFR_write_reg(CONFIG,0x0A))  // Prim TX, CRC
00144 #define NRF_init_rx()            (NRF_disable(),NFR_write_reg(CONFIG,0x0B),NRF_enable())  // Prim RX, CRC, PowerUp
00145 
00146 #define Is_not_NRF_IRQ()         ((NRF_IRQ_PORT & (1<<NRF_IRQ_PIN))? TRUE : FALSE)
00147 #define Is_NRF_IRQ()             ((NRF_IRQ_PORT & (1<<NRF_IRQ_PIN))? FALSE : TRUE)
00148 
00149 
00150 #define NRF_tx_buffer(buf,n)     (NRF_write_buf(WR_TX_PLOAD,buf,n))
00151 #define NRF_rx_buffer(buf,n)     (NRF_read_buf(RD_RX_PLOAD,buf,n))
00152 
00153 #define NRF_set_payload(pipe,n)  (NFR_write_reg(RX_PW_P##pipe,n))
00154 
00155 #define NRF_set_channel(n)       (NFR_write_reg(RF_CH,n))
00156 #define NRF_set_byte_addr(n)     (NFR_write_reg(SETUP_AW,n-2))
00157 
00158 #define NRF_ack_RX_DR()          (NFR_write_reg(STATUS,(1<<NRF_RX_DR)))
00159 #define NRF_ack_TX_DR()          (NFR_write_reg(STATUS,(1<<NRF_TX_DR)))
00160 #define NRF_ack_MAX_RT()         (NFR_write_reg(STATUS,(1<<NRF_MAX_RT)))
00161 #define NRF_ack_received()       (NRF_ack_RX_DR())
00162 #define NRF_ack_transmit()       (NRF_ack_TX_DR())
00163 #define NRF_ack_timeout()        (NRF_ack_MAX_RT())
00164 
00165 #define NRF_flush_rx()           (NFR_write_reg(FLUSH_RX,0))
00166 
00167 #define Is_NRF_RX_DR()           (NFR_read_reg(STATUS)&(1<<NRF_RX_DR) ? TRUE : FALSE)
00168 #define Is_NRF_TX_DR()           (NFR_read_reg(STATUS)&(1<<NRF_TX_DR) ? TRUE : FALSE)
00169 #define Is_NRF_MAX_RT()          (NFR_read_reg(STATUS)&(1<<NRF_MAX_RT) ? TRUE : FALSE)
00170 
00171 #define Is_NRF_received()        (Is_NRF_RX_DR())
00172 #define Is_NRF_transmit()        (Is_NRF_TX_DR())
00173 #define Is_NRF_timeout()         (Is_NRF_MAX_RT())
00174 
00175 #define NRF_Write_addr(reg,buf,n)   NRF_write_buf(reg+0x20,buf, n)
00176 
00177 //_____ D E C L A R A T I O N S ____________________________________________
00178 
00179  U8 SPI_RW(U8 byte);                                // Single SPI read/write
00180  U8 NRF_Read(U8 reg);                               // Read one byte from nRF24L01
00181  U8 NRF_RW_Reg(U8 reg, U8 value);                 // Write one byte to register 'reg'
00182  U8 NRF_read_buf(U8 reg, U8 *pBuf, U8 bytes);   // Read multiply bytes from one register
00183  U8 NRF_write_buf(U8 reg, U8 *pBuf, U8 bytes);
00184 
00185 
00186 //_____ S A M P L E   U S A G E with AT90USB128 USB software library _______
00187 #if 0
00188 /*
00189 //_____  I N C L U D E S ___________________________________________________
00190 
00191 #include "config.h"
00192 #include "conf_usb.h"
00193 #include "rf_task.h"
00194 #include "lib_mcu/usb/usb_drv.h"
00195 #include "usb_descriptors.h"
00196 #include "modules/usb/device_chap9/usb_standard_request.h"
00197 #include "usb_specific_request.h"
00198 #include "lib_mcu/spi/spi_lib.h"
00199 #include "lib_board/nrf24l01/nRF_API.h"
00200 
00201 
00202 
00203 //_____ M A C R O S ________________________________________________________
00204 
00205 
00206 //_____ D E F I N I T I O N S ______________________________________________
00207 
00208 //_____ D E C L A R A T I O N S ____________________________________________
00209 
00210 volatile U8  tmp;
00211 U8 rx_buf[32];
00212 U8 tx_buf[32];
00213 
00222 void rf_task_init(void)
00223 {
00224    Leds_init();
00225    NRF_port_init();
00226    spi_init(SPI_MASTER);
00227    NRF_init_rx();           // Set nRf primary receiver
00228    NRF_set_payload(0,8);    // Pipe 0 receiver is 8 bytes
00229    NRF_enable();            // Enable receiver
00230 }
00231 
00232 
00233 
00234 
00235 
00244 void rf_task(void)
00245 {
00246    U8 i;
00247 
00248    if(Is_device_enumerated())             // Check USB HID is enumerated
00249    {
00250       Usb_select_endpoint(EP_HID_OUT);    // Get Data repport from Host
00251       if(Is_usb_receive_out())            // Something received on the USB?
00252       {
00253          for(i=0;i<EP_OUT_LENGTH;i++)
00254          {
00255             tx_buf[i]=Usb_read_byte();
00256          }
00257          NRF_init_tx();                   // RF is Tx mode
00258          NRF_tx_buffer(tx_buf, 8);        // Send data to Rf
00259          while(Is_not_NRF_IRQ());         // Wait event from Rf
00260          if(Is_NRF_transmit())            // Data sent ?
00261          {
00262             NRF_ack_TX_DR();
00263          }
00264          else if (Is_NRF_timeout())
00265          {
00266             NRF_ack_MAX_RT();
00267          }
00268          NRF_init_rx();
00269          Usb_ack_receive_out();
00270       }
00271 
00272       if (Is_NRF_IRQ())                            // Something received on Rf ?
00273       {
00274          if(Is_NRF_received())
00275          {
00276             Led_usb_toggle();
00277             NRF_rx_buffer(rx_buf,8);               // Get data from Rf
00278             Usb_select_endpoint(EP_HID_IN);        // Ready to send these information to the host application
00279             while(Is_usb_write_enabled()==FALSE);  // Wait EP ready
00280             {
00281                for(i=0;i<EP_IN_LENGTH;i++)
00282                {
00283                   Usb_write_byte(rx_buf[i]);
00284                }
00285                Usb_ack_in_ready();                 // Send data over the USB
00286             }
00287             NRF_ack_RX_DR();
00288          }
00289       }
00290    }
00291 }
00292 */
00293 #endif

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