wdt_drv.h

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00013 
00014 /* Copyright (c) 2007, Atmel Corporation All rights reserved.
00015  *
00016  * Redistribution and use in source and binary forms, with or without
00017  * modification, are permitted provided that the following conditions are met:
00018  *
00019  * 1. Redistributions of source code must retain the above copyright notice,
00020  * this list of conditions and the following disclaimer.
00021  *
00022  * 2. Redistributions in binary form must reproduce the above copyright notice,
00023  * this list of conditions and the following disclaimer in the documentation
00024  * and/or other materials provided with the distribution.
00025  *
00026  * 3. The name of ATMEL may not be used to endorse or promote products derived
00027  * from this software without specific prior written permission.
00028  *
00029  * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
00030  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
00031  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
00032  * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
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00034  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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00036  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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00038  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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00040 
00041 
00042 #ifndef _WDT_DRV_H_
00043 #define _WDT_DRV_H_
00044 
00045 //_____ I N C L U D E S ____________________________________________________
00046 
00047 #ifdef __GNUC__
00048    #include <avr/io.h>
00049    #include <avr/wdt.h>
00050 #endif
00051 
00052 
00053 //_____ M A C R O S ________________________________________________________
00054 
00057 
00058 #define Is_ext_reset()  ((MCUSR&(1<<EXTRF)) ? TRUE:FALSE)
00059 #define Ack_ext_reset() (MCUSR= ~(1<<EXTRF))
00060 #define Is_POR_reset()  ((MCUSR&(1<<(MCUSR= ~(1<<PORF)))) ? TRUE:FALSE)
00061 #define Ack_POR_reset() (MCUSR= ~(1<<PORF))
00062 #define Is_BOD_reset()  ((MCUSR&(1<<BORF)) ? TRUE:FALSE)
00063 #define Ack_BOD_reset() (MCUSR= ~(1<<BORF))
00064 #define Is_wdt_reset()  ((MCUSR&(1<<WDRF)) ? TRUE:FALSE)
00065 #define Ack_wdt_reset() (MCUSR= ~(1<<WDRF))
00066 
00067 #ifdef __GNUC__
00068 //#define Wdt_reset_instruction()   (asm("WDR"))
00069 #define Wdt_reset_instruction()  (wdt_reset())
00070 #else
00071 #define Wdt_reset_instruction()  (__watchdog_reset())
00072 #endif
00073 #define Wdt_clear_flag()         (Ack_wdt_reset())
00074 #define Wdt_change_enable()      (WDTCSR |= (1<<WDCE) | (1<<WDE))
00075 #define Wdt_enable_16ms()        (WDTCSR =  (1<<WDE))
00076 #define Wdt_enable_32ms()        (WDTCSR =  (1<<WDE) | (1<<WDP0) )
00077 #define Wdt_enable_64ms()        (WDTCSR =  (1<<WDE) | (1<<WDP1) )
00078 #define Wdt_enable_125ms()       (WDTCSR =  (1<<WDE) | (1<<WDP1) | (1<<WDP0))
00079 #define Wdt_enable_250ms()       (WDTCSR =  (1<<WDE) | (1<<WDP2) )
00080 #define Wdt_enable_500ms()       (WDTCSR =  (1<<WDE) | (1<<WDP2) | (1<<WDP0))
00081 #define Wdt_enable_1s()          (WDTCSR =  (1<<WDE) | (1<<WDP2) | (1<<WDP1))
00082 #define Wdt_enable_2s()          (WDTCSR =  (1<<WDE) | (1<<WDP2) | (1<<WDP1) | (1<<WDP0))
00083 #define Wdt_enable_4s()          (WDTCSR =  (1<<WDE) | (1<<WDP3) )
00084 #define Wdt_enable_8s()          (WDTCSR =  (1<<WDE) | (1<<WDP3) | (1<<WDP0))
00085 
00086 #define Wdt_interrupt_16ms()     (WDTCSR =  (1<<WDIE))
00087 #define Wdt_interrupt_32ms()     (WDTCSR =  (1<<WDIE) | (1<<WDP0) )
00088 #define Wdt_interrupt_64ms()     (WDTCSR =  (1<<WDIE) | (1<<WDP1) )
00089 #define Wdt_interrupt_125ms()    (WDTCSR =  (1<<WDIE) | (1<<WDP1) | (1<<WDP0))
00090 #define Wdt_interrupt_250ms()    (WDTCSR =  (1<<WDIE) | (1<<WDP2) )
00091 #define Wdt_interrupt_500ms()    (WDTCSR =  (1<<WDIE) | (1<<WDP2) | (1<<WDP0))
00092 #define Wdt_interrupt_1s()       (WDTCSR =  (1<<WDIE) | (1<<WDP2) | (1<<WDP1))
00093 #define Wdt_interrupt_2s()       (WDTCSR =  (1<<WDIE) | (1<<WDP2) | (1<<WDP1) | (1<<WDP0))
00094 #define Wdt_interrupt_4s()       (WDTCSR =  (1<<WDIE) | (1<<WDP3) )
00095 #define Wdt_interrupt_8s()       (WDTCSR =  (1<<WDIE) | (1<<WDP3) | (1<<WDP0))
00096 
00097 #define Wdt_enable_reserved5()   (WDTCSR =  (1<<WDE) | (1<<WDP3) | (1<<WDP2) | (1<<WDP1) | (1<<WDP0))
00098 #define Wdt_stop()               (WDTCSR = 0x00)
00099 
00100 #define Wdt_ack_interrupt()      (WDTCSR = ~(1<<WDIF))
00101 #define Is_wdt_interrupt()         (WDTCSR&(1<<WDIF) ? TRUE:FALSE)
00102 #define Is_not_wdt_interrupt()         (WDTCSR&(1<<WDIF) ? FALSE:TRUE)
00103 #define Is_wdt_early_warning()         (WDTCKD&(1<<WDEWIF) ? TRUE:FALSE)
00104 #define Is_not_wdt_early_warning()      (WDTCKD&(1<<WDEWIF) ? FALSE:TRUE)
00105 
00106 
00107 
00119 #define Wdt_off()                (Wdt_reset_instruction(),  \
00120                                   Wdt_clear_flag(),         \
00121                                   Wdt_change_enable(),      \
00122                                   Wdt_stop())
00123 
00124 
00125 
00126 
00138 #define Wdt_change_16ms()        (Wdt_reset_instruction(), \
00139                                   Wdt_change_enable(),     \
00140                                   Wdt_enable_32ms() )
00141                               
00153 #define Wdt_change_32ms()        (Wdt_reset_instruction(), \
00154                                   Wdt_change_enable(),     \
00155                                   Wdt_enable_32ms() )
00156 
00157 
00169 #define Wdt_change_64ms()        (Wdt_reset_instruction(), \
00170                                   Wdt_change_enable(),     \
00171                                   Wdt_enable_64ms() )
00172 
00173 
00174 
00175 
00187 #define Wdt_change_125ms()       (Wdt_reset_instruction(), \
00188                                   Wdt_change_enable(),     \
00189                                   Wdt_enable_125ms() )
00190 
00202 #define Wdt_change_250ms()       (Wdt_reset_instruction(), \
00203                                   Wdt_change_enable(),     \
00204                                   Wdt_enable_250ms() )
00205 
00217 #define Wdt_change_500ms()       (Wdt_reset_instruction(), \
00218                                   Wdt_change_enable(),     \
00219                                   Wdt_enable_500ms() )
00220 
00232 #define Wdt_change_1s()          (Wdt_reset_instruction(), \
00233                                   Wdt_change_enable(),     \
00234                                   Wdt_enable_1s() )
00235 
00236 
00248 #define Wdt_change_2s()          (Wdt_reset_instruction(), \
00249                                   Wdt_change_enable(),     \
00250                                   Wdt_enable_2s() )
00262 #define Wdt_change_4s()          (Wdt_reset_instruction(), \
00263                                   Wdt_change_enable(),     \
00264                                   Wdt_enable_4s() )
00265 
00266 
00278 #define Wdt_change_8s()          (Wdt_reset_instruction(), \
00279                                   Wdt_change_enable(),     \
00280                                   Wdt_enable_8s() )
00281 
00282 
00294 #define Wdt_change_interrupt_16ms()    (Wdt_reset_instruction(), \
00295                                         Wdt_change_enable(),     \
00296                                         Wdt_interrupt_16ms() )
00297 
00309 #define Wdt_change_interrupt_32ms()    (Wdt_reset_instruction(), \
00310                                         Wdt_change_enable(),     \
00311                                         Wdt_interrupt_32ms() )
00312 
00324 #define Wdt_change_interrupt_64ms()    (Wdt_reset_instruction(), \
00325                                         Wdt_change_enable(),     \
00326                                         Wdt_interrupt_64ms() )
00327 
00339 #define Wdt_change_interrupt_125ms()      (Wdt_reset_instruction(), \
00340                                            Wdt_change_enable(),     \
00341                                            Wdt_interrupt_125ms() )
00342 
00354 #define Wdt_change_interrupt_250ms()      (Wdt_reset_instruction(), \
00355                   Wdt_change_enable(),     \
00356                   Wdt_interrupt_250ms() )
00357 
00369 #define Wdt_change_interrupt_500ms()      (Wdt_reset_instruction(), \
00370                   Wdt_change_enable(),     \
00371                   Wdt_interrupt_500ms() )
00372 
00384 #define Wdt_change_interrupt_1s()      (Wdt_reset_instruction(), \
00385                   Wdt_change_enable(),     \
00386                   Wdt_interrupt_1s() )
00387 
00399 #define Wdt_change_interrupt_2s()      (Wdt_reset_instruction(), \
00400                   Wdt_change_enable(),     \
00401                   Wdt_interrupt_2s() )
00402 
00414 #define Wdt_change_interrupt_4s()      (Wdt_reset_instruction(), \
00415                   Wdt_change_enable(),     \
00416                   Wdt_interrupt_4s() )
00417 
00429 #define Wdt_change_interrupt_8s()      (Wdt_reset_instruction(), \
00430                   Wdt_change_enable(),     \
00431                   Wdt_interrupt_8s() )
00432 
00433 #define Wdt_change_reserved5()   (Wdt_reset_instruction(), \
00434                                  Wdt_change_enable(),     \
00435                                  Wdt_enable_reserved5() )
00436 
00437 #define Soft_reset()             {asm("jmp 0000");}
00438 
00440 
00441 
00442 
00443 
00444 #endif  // _WDT_DRV_H_
00445 

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